In December, many researchers gathered to discuss the issue of maximized scalibility. Companies like Samsung, Intel, and Toshiba proposed a variety of 3D structures that all stack several memory layers to increase the memory density per unit area of silicon in order to decrease the cost per bit. The challenge with 3D memory technologies using thin-film transistors is guranteeing an effective performance and reliability.
There has been a shift to a two-terminal device rather than the standard three-terminal transistor to maximize storage. Researchers from Intel introduced the use of chalcogenide to address phase-change memory storage elements by exploiting the ovonic threshold switching effect. The chalcogenide alloys can replace transistors in accessing storage elements inside a memory array. In addition to this, other alternative non-volatile storage elements that do not use a floating gate have been developed. These include resistive random access memory based on metal oxides and charge trap memories such as SONOS.
Al Fazio of Intel has delivered a warning that increasingly complex algorithims will need to be developed to make sure the flash memory behaves as anticipated in its most popular form NAND. He also recognized that 3D cross-point memories would be a vehicle to produce the high speed and low cost that can positively shape the memory capacity in storage applications.